Using Field Programmable Gate Array Acceleration?

1

Hi Everyone,

I am soon to be new PhD student (wish me luck!) and part of my research will involve exploring the use of customized Field Programmable Gate Arrays as a way to reduce computational cost when performing DFT. This has been done before in the literature (see FPGA implementation of exchange-correlation potential calculation for DFT or https://pubs.acs.org/doi/abs/10.1021/acs.jctc.9b01284)

I was wondering if it would be possible or if anyone had any experience with using Psi4 with this approach for example offloading computation of the exchange-correlation potential to a custom designed FPGA.

Thanks for any help in advance!

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Well, the closest to this is the interface of Psi4 with GauXC, which does xc quadrature on GPGPUs…

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Thanks for sharing this!